It is sometimes necessary to use a negative voltage in a construction that already has a positive drive voltage. For example, you might want a symmetrical drive voltage for an op-amp that otherwise only consists of logic circuits. Making a circuit that inverts the drive voltage can be a problem, especially in a battery derived equipment.
In this circuit, T1 is opened and closed with a square voltage with 50% duty cycle and a frequency of approx. 10 kHz. In logic designs, such a signal is often already available or can easily be generated with an mcu i/o pin. If not, you can make one from two inverter ports, for example HC04.
When T1 is not conducting, C1 is charged through T2 and D2 up to approx. 11V. When T1 conducts, T2 is off and the positive part of C1 is reduced to approx. 0.8V through D1. The negative side of C1 is now approx. 10.2V negative which makes C1 discharges through D3 to C2 which charges up. If no current is drawn from C2, then the capacitor is charged to approximately -10V. If C2 is loaded with a relatively large current, the voltage across the capacitor will naturally drop by a ratio shown on the graphic diagram below. A 10kHz ripple will also be visible.